Sheng Chang received the B.S. and M.S. degrees from the University of Electronic Science and Technology of China, Chengdu, China, in 2016 and 2019, respectively.
His research interests include high-speed and high-resolution SAR ADC, digitally-assisted analog circuits design, energy-efficient analog and mixed-signal circuit design.
S. Chang, X. Zhou, Z. Ding and Q. Li, "A 12-bit 30MS/s SAR ADC with VCO-Based Comparator and Split-and-Recombination Redundancy for Bypass Logic," 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5.