Lishan Lv (S’14) was born in Sichuan province of China, in 1990. He received the B.S. degree from School of Microelectronics and Solid-State Electronic, University of Electronic Science and Technology of China, Chengdu, China in 2012.
He received his Ph.D. degree in 2018 in microelectronics at the University of Electronic Science and Technology of China.
His current research interests are low-voltage analog circuits design and low power oversampling ADCs.
Publication
- L. S. Lv, X. Zhou, Z. Qiao, Q. Li. Inverter-based Subthreshold Amplifier Techniques and Their Application in 0.3V Δ?-Modulators [J]. IEEE Journal of Solid-State Circuts(JSSC), 2019.
- L. S. Lv, A. Jain, X. Zhou, J. Beker, Q. Li and M. Ortamnns. A 0.4V Gm-C propotional-integrator-based continous-time ΔΣ modulator with 50kHz BW and 74.4dB SNDR[J]. IEEE Journal of Solid-State Circuts(JSSC), 2019.
- L. S. Lv, Q. Li. 300mV 50kHz 75.9dB SNDR CT ΔΣ Modulator with Inverter-based Feedforward OTAs[C]. In IEEE Int. Symp. Circuits and Systems(ISCAS). Lisbon, 2015,313-316
- L. S. Lv, Q. Li. A low-power CT sigma-delta modulator with 2b/cycle SAR quantizer[C]. In IEEE Int. Midwest Symp Circuits and Systems(MWCAS). Texas, 2014,845-848.